Dual-Mode Low-Drop-Out Regulator/Power Gate With Linear and On-Off Conduction for Microprocessor Core On-Die Supply Voltages in 14 nm

Kosta Luria, Joseph Shor, Michael Zelikson, Alex Lyakhov

Research output: Contribution to journalArticlepeer-review

16 Scopus citations

Abstract

A dual-mode digital power gate (PG) and linear low-drop-out regulator (LDO) has been demonstrated in 14 nm. A modified flipped source follower driver circuit is used to minimize dI/dt droops. The LDO has a novel compensation method which utilizes capacitance multiplication and can drive a 1-7 μF load without any external compensation elements. This LDO exhibits high-current drive capability (3 A) at low-dropout voltages (< 60 mV) and high-current efficiency (> 99%), making it suitable to drive a microprocessor core.

Original languageEnglish
Article number7383230
Pages (from-to)752-762
Number of pages11
JournalIEEE Journal of Solid-State Circuits
Volume51
Issue number3
DOIs
StatePublished - Mar 2016

Bibliographical note

Publisher Copyright:
© 2015 IEEE.

Keywords

  • Analog
  • low-drop-out regulator (LDO)
  • microprocessors
  • power management

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