Abstract
A dual-mode digital power gate (PG) and linear low-drop-out regulator (LDO) has been demonstrated in 14 nm. A modified flipped source follower driver circuit is used to minimize dI/dt droops. The LDO has a novel compensation method which utilizes capacitance multiplication and can drive a 1-7 μF load without any external compensation elements. This LDO exhibits high-current drive capability (3 A) at low-dropout voltages (< 60 mV) and high-current efficiency (> 99%), making it suitable to drive a microprocessor core.
Original language | English |
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Article number | 7383230 |
Pages (from-to) | 752-762 |
Number of pages | 11 |
Journal | IEEE Journal of Solid-State Circuits |
Volume | 51 |
Issue number | 3 |
DOIs | |
State | Published - Mar 2016 |
Bibliographical note
Publisher Copyright:© 2015 IEEE.
Keywords
- Analog
- low-drop-out regulator (LDO)
- microprocessors
- power management