Dual mode logic-design for energy efficiency and high performance

Keyphrases

• High Performance 100%
• Logic Design 100%
• Dual Mode Logic 100%
• Design for Energy Efficiency 100%
• Energy Efficiency Performance 100%
• Energy Consumption Reduction 66%
• Performance Improvement 33%
• Low Energy 33%
• Combinatorial Circuits 33%
• CMOS Process 33%
• Standard CMOS Technology 33%
• Logic Gates 33%
• CMOS Implementation 33%
• Carry Select Adder 33%
• Significant Energy 33%
• Energy Performance 33%
• Digital CMOS 33%
• Gate Level 33%
• Energy Efficiency Improvement 33%
• Performance Modes 33%
• Energy-delay Optimization 33%

Engineering

• Energy Engineering 100%
• Logic Design 100%
• Energy Conservation 100%
• Energy Efficiency 100%
• Combinatorial Circuits 33%
• Adders 33%
• Logic Gate 33%
• Carry Bit 33%
• Performance Improvement 33%
• Energy Performance 33%
• Energy Consumption Reduction 33%
• Critical Path 33%