TY - JOUR
T1 - Direct analysis and synthesis of multiphase switched-current networks using signal-flow graphs
AU - Helfenstein, Markus
AU - Muralt, Arnold
AU - Moschytz, George S.
PY - 1998
Y1 - 1998
N2 - A by-inspection analysis and synthesis method for multiphase switched-current (SI) circuits using signal-flow graph (SFG) techniques is presented. The SFG is derived on the transistor level and the method is primarily useful for the hand analysis and design of small and medium-size SI circuits (e.g. SI filters, decimators, interpolators). Tables of commonly used SI circuits, in which the corresponding SFGs and circuits are given, make the derivation easy and fast. From the SFGs, not only the overall discrete-time transfer function, but also those in-between individual switching phases, are obtainable. With the proposed method it is straightforward to include non-ideal effects, such as finite output resistance of MOS transistors, clock-feedthrough and settling error. The method is also a useful tool for the synthesis of new SI circuits. It is shown that every low-sensitivity switched-capacitor (SC) circuit can be mapped directly into a low-sensitivity SI circuit with a corresponding topology. Examples of transformed SC circuits are given and two new double sampling integrators are introduced.
AB - A by-inspection analysis and synthesis method for multiphase switched-current (SI) circuits using signal-flow graph (SFG) techniques is presented. The SFG is derived on the transistor level and the method is primarily useful for the hand analysis and design of small and medium-size SI circuits (e.g. SI filters, decimators, interpolators). Tables of commonly used SI circuits, in which the corresponding SFGs and circuits are given, make the derivation easy and fast. From the SFGs, not only the overall discrete-time transfer function, but also those in-between individual switching phases, are obtainable. With the proposed method it is straightforward to include non-ideal effects, such as finite output resistance of MOS transistors, clock-feedthrough and settling error. The method is also a useful tool for the synthesis of new SI circuits. It is shown that every low-sensitivity switched-capacitor (SC) circuit can be mapped directly into a low-sensitivity SI circuit with a corresponding topology. Examples of transformed SC circuits are given and two new double sampling integrators are introduced.
KW - Multirate techniques
KW - Nonidealities in SI
KW - Signal-flow graph techniques
KW - Switched-current filters
UR - http://www.scopus.com/inward/record.url?scp=0032069276&partnerID=8YFLogxK
U2 - 10.1002/(SICI)1097-007X(199805/06)26:3<253::AID-CTA8>3.0.CO;2-A
DO - 10.1002/(SICI)1097-007X(199805/06)26:3<253::AID-CTA8>3.0.CO;2-A
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AN - SCOPUS:0032069276
SN - 0098-9886
VL - 26
SP - 253
EP - 280
JO - International Journal of Circuit Theory and Applications
JF - International Journal of Circuit Theory and Applications
IS - 3
ER -