Designing fault tolerant FSM by nano-PLA

S. Baranov; I. Levin; O. Keren; M. Karpovsky

doi:10.1109/iolts.2009.5196021

Designing fault tolerant FSM by nano-PLA

S. Baranov, I. Levin, O. Keren, M. Karpovsky

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

20 Scopus citations

Abstract

The paper deals with designing fault tolerant finite state machines (FSMs) by nanoelectronic programmable logic arrays (PLAs). Two main critical parameters of the fault tolerant nano-PLAs, the area and the number of crosspoint devices, are considered as optimization criteria for the synthesis. The paper introduces a method for synthesizing fault tolerant nano-PLA based FSMs. The method is based on decomposing an initial PLA description of the FSM into a three interacting portions. The proposed solution provides significant reduction of the area without meaningful increasing of a number of crosspoint devices in comparison with known solutions and provides a trade-off between the area and the number of devices in designing FSMs by PLAs.

Original language	English
Title of host publication	2009 15th IEEE International On-Line Testing Symposium, IOLTS 2009
Pages	229-234
Number of pages	6
DOIs	https://doi.org/10.1109/iolts.2009.5196021
State	Published - 2009
Event	2009 15th IEEE International On-Line Testing Symposium, IOLTS 2009 - Sesimbra-Lisbon, Portugal Duration: 24 Jun 2009 → 26 Jun 2009

Publication series

Name	2009 15th IEEE International On-Line Testing Symposium, IOLTS 2009

Conference

Conference	2009 15th IEEE International On-Line Testing Symposium, IOLTS 2009
Country/Territory	Portugal
City	Sesimbra-Lisbon
Period	24/06/09 → 26/06/09

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10.1109/iolts.2009.5196021

Cite this

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title = "Designing fault tolerant FSM by nano-PLA",

abstract = "The paper deals with designing fault tolerant finite state machines (FSMs) by nanoelectronic programmable logic arrays (PLAs). Two main critical parameters of the fault tolerant nano-PLAs, the area and the number of crosspoint devices, are considered as optimization criteria for the synthesis. The paper introduces a method for synthesizing fault tolerant nano-PLA based FSMs. The method is based on decomposing an initial PLA description of the FSM into a three interacting portions. The proposed solution provides significant reduction of the area without meaningful increasing of a number of crosspoint devices in comparison with known solutions and provides a trade-off between the area and the number of devices in designing FSMs by PLAs.",

author = "S. Baranov and I. Levin and O. Keren and M. Karpovsky",

year = "2009",

doi = "10.1109/iolts.2009.5196021",

language = "אנגלית",

isbn = "9781424445950",

series = "2009 15th IEEE International On-Line Testing Symposium, IOLTS 2009",

pages = "229--234",

booktitle = "2009 15th IEEE International On-Line Testing Symposium, IOLTS 2009",

note = "2009 15th IEEE International On-Line Testing Symposium, IOLTS 2009 ; Conference date: 24-06-2009 Through 26-06-2009",

}

Baranov, S, Levin, I, Keren, O & Karpovsky, M 2009, Designing fault tolerant FSM by nano-PLA. in 2009 15th IEEE International On-Line Testing Symposium, IOLTS 2009., 5196021, 2009 15th IEEE International On-Line Testing Symposium, IOLTS 2009, pp. 229-234, 2009 15th IEEE International On-Line Testing Symposium, IOLTS 2009, Sesimbra-Lisbon, Portugal, 24/06/09. https://doi.org/10.1109/iolts.2009.5196021

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AU - Karpovsky, M.

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AB - The paper deals with designing fault tolerant finite state machines (FSMs) by nanoelectronic programmable logic arrays (PLAs). Two main critical parameters of the fault tolerant nano-PLAs, the area and the number of crosspoint devices, are considered as optimization criteria for the synthesis. The paper introduces a method for synthesizing fault tolerant nano-PLA based FSMs. The method is based on decomposing an initial PLA description of the FSM into a three interacting portions. The proposed solution provides significant reduction of the area without meaningful increasing of a number of crosspoint devices in comparison with known solutions and provides a trade-off between the area and the number of devices in designing FSMs by PLAs.

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Designing fault tolerant FSM by nano-PLA

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