Data-dependent delay circuits

A. Fish (Inventor), I. Levi (Inventor), O. Keren (Inventor)

Research output: Patent


A method of designing a logic circuit with data-dependent delays is performed using an electronic design automation system. The logic circuit includes logic paths from logic inputs to at least one logic output. The method includes: obtaining an initial circuit design; specifying respective delays for multiple logic paths in the initial circuit design such that at least some of the outputs switch at different times within a clock cycle for different combinations of logic input levels; and forming a second circuit design having the specified respective delays along the respective logic paths by adding delay elements to the initial circuit design based on the specified respective delays.
Original languageAmerican English
Patent numberUS 10,521,530
StatePublished - 2019


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