Abstract
Compact protection codes (CPCs) provide optimal protection against fault injections attacks on memory arrays content. Nevertheless, CPCs fail to detect errors injected into the address itself. Consequently, an adversary can write a correct data word to an erroneous address without being detected. This paper presents an efficient code, dubbed AD-CPC, which detects both data manipulations and faults injected into the address decoder. No additional redundancy bits are required and no latency is introduced. In addition, the new encoding has a negligible effect on the error masking probability of the original CPC. We provide theoretical bounds and experimental results that support these claims. We show that with r additional redundant bits every error can be detected with probability of at least 1 - 3 • 2-r.
Original language | English |
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Title of host publication | Proceedings - 2021 IEEE European Test Symposium, ETS 2021 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
ISBN (Electronic) | 9781665418492 |
DOIs | |
State | Published - 24 May 2021 |
Event | 26th IEEE European Test Symposium, ETS 2021 - Virtual, Bruges, Belgium Duration: 24 May 2021 → 28 May 2021 |
Publication series
Name | Proceedings of the European Test Workshop |
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Volume | 2021-May |
ISSN (Print) | 1530-1877 |
ISSN (Electronic) | 1558-1780 |
Conference
Conference | 26th IEEE European Test Symposium, ETS 2021 |
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Country/Territory | Belgium |
City | Virtual, Bruges |
Period | 24/05/21 → 28/05/21 |
Bibliographical note
Publisher Copyright:© 2021 IEEE.
Funding
The authors are with the Faculty of Engineering, Bar-Ilan University, Ramat Gan. This work was supported by the Israel Science Foundation under Grant 932/16.
Funders | Funder number |
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Israel Science Foundation | 932/16 |
Keywords
- Error detecting codes
- Fault injection attacks
- Hardware security
- Robust codes
- Secure memory