Compact protection codes (CPCs) provide optimal protection against fault injections attacks on memory arrays content. Nevertheless, CPCs fail to detect errors injected into the address itself. Consequently, an adversary can write a correct data word to an erroneous address without being detected. This paper presents an efficient code, dubbed AD-CPC, which detects both data manipulations and faults injected into the address decoder. No additional redundancy bits are required and no latency is introduced. In addition, the new encoding has a negligible effect on the error masking probability of the original CPC. We provide theoretical bounds and experimental results that support these claims. We show that with r additional redundant bits every error can be detected with probability of at least 1 - 3 • 2-r.
|Title of host publication||Proceedings - 2021 IEEE European Test Symposium, ETS 2021|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|State||Published - 24 May 2021|
|Event||26th IEEE European Test Symposium, ETS 2021 - Virtual, Bruges, Belgium|
Duration: 24 May 2021 → 28 May 2021
|Name||Proceedings of the European Test Workshop|
|Conference||26th IEEE European Test Symposium, ETS 2021|
|Period||24/05/21 → 28/05/21|
Bibliographical notePublisher Copyright:
© 2021 IEEE.
- Error detecting codes
- Fault injection attacks
- Hardware security
- Robust codes
- Secure memory