Combining software and hardware verification techniques

Robert P. Kurshan, Vladimir Levin, Marius Minea, Doron Peled, Hüsnü Yenigün

Research output: Contribution to journalArticlepeer-review

19 Scopus citations

Abstract

Combining verification methods developed separately for software and hardware is motivated by the industry's need for a technology that would make formal verification of realistic software/hardware co-designs practical. We focus on techniques that have proved successful in each of the two domains: BDD-based symbolic model checking for hardware verification and partial order reduction for the verification of concurrent software programs. In this paper, we first suggest a modification of partial order reduction, allowing its combination with any BDD-based verification tool, and then describe a co-verification methodology developed using these techniques jointly. Our experimental results demonstrate the efficiency of this combined verification technique, and suggest that for moderate-size systems the method is ready for industrial application.

Original languageEnglish
Pages (from-to)251-280
Number of pages30
JournalFormal Methods in System Design
Volume21
Issue number3
DOIs
StatePublished - Nov 2002
Externally publishedYes

Keywords

  • Formal verification
  • Hardware/software co-design
  • Model checking
  • Partial order reduction

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