CMOS current/voltage mode winner-take-all circuit with spatial filtering

Alexander Fish; Orly Yadid-Pecht

doi:10.1109/ISCAS.2001.921391

CMOS current/voltage mode winner-take-all circuit with spatial filtering

Alexander Fish, Orly Yadid-Pecht

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

18 Scopus citations

Abstract

A CMOS current/voltage mode winner-take-all circuit (WTA) with spatial filtering for image processing applications is presented. This WTA circuit has a unique ability of spatial filtering that allows removal of the background from the image and is suitable for integration with CMOS Active Pixel Sensors. In this circuit, image intensity has been chosen for the input saliency map. The removal process is performed by zeroing the values of the image background intensity levels and transferring the new saliency map to a standard WTA circuit, so only the potential objects of interest are compared by the WTA. Two circuits, current mode and voltage mode WTA circuits with filtering, have been implemented in 0.5 um submicron CMOS technology. Their operation is discussed and simulation results are reported.

Original language	English
Title of host publication	ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
Pages	636-639
Number of pages	4
DOIs	https://doi.org/10.1109/ISCAS.2001.921391
State	Published - 2001
Externally published	Yes
Event	2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001 - Sydney, NSW, Australia Duration: 6 May 2001 → 9 May 2001

Publication series

Name	ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
Volume	3

Conference

Conference	2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001
Country/Territory	Australia
City	Sydney, NSW
Period	6/05/01 → 9/05/01

Access to Document

10.1109/ISCAS.2001.921391

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Fish, A., & Yadid-Pecht, O. (2001). CMOS current/voltage mode winner-take-all circuit with spatial filtering. In ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings (pp. 636-639). [921391] (ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings; Vol. 3). https://doi.org/10.1109/ISCAS.2001.921391

@inproceedings{642510ce858f49b69194552101d90965,

title = "CMOS current/voltage mode winner-take-all circuit with spatial filtering",

abstract = "A CMOS current/voltage mode winner-take-all circuit (WTA) with spatial filtering for image processing applications is presented. This WTA circuit has a unique ability of spatial filtering that allows removal of the background from the image and is suitable for integration with CMOS Active Pixel Sensors. In this circuit, image intensity has been chosen for the input saliency map. The removal process is performed by zeroing the values of the image background intensity levels and transferring the new saliency map to a standard WTA circuit, so only the potential objects of interest are compared by the WTA. Two circuits, current mode and voltage mode WTA circuits with filtering, have been implemented in 0.5 um submicron CMOS technology. Their operation is discussed and simulation results are reported.",

author = "Alexander Fish and Orly Yadid-Pecht",

year = "2001",

doi = "10.1109/ISCAS.2001.921391",

language = "אנגלית",

isbn = "0780366859",

series = "ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings",

pages = "636--639",

booktitle = "ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings",

note = "2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001 ; Conference date: 06-05-2001 Through 09-05-2001",

}

Fish, A & Yadid-Pecht, O 2001, CMOS current/voltage mode winner-take-all circuit with spatial filtering. in ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings., 921391, ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings, vol. 3, pp. 636-639, 2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001, Sydney, NSW, Australia, 6/05/01. https://doi.org/10.1109/ISCAS.2001.921391

CMOS current/voltage mode winner-take-all circuit with spatial filtering. / Fish, Alexander; Yadid-Pecht, Orly.
ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings. 2001. p. 636-639 921391 (ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings; Vol. 3).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AB - A CMOS current/voltage mode winner-take-all circuit (WTA) with spatial filtering for image processing applications is presented. This WTA circuit has a unique ability of spatial filtering that allows removal of the background from the image and is suitable for integration with CMOS Active Pixel Sensors. In this circuit, image intensity has been chosen for the input saliency map. The removal process is performed by zeroing the values of the image background intensity levels and transferring the new saliency map to a standard WTA circuit, so only the potential objects of interest are compared by the WTA. Two circuits, current mode and voltage mode WTA circuits with filtering, have been implemented in 0.5 um submicron CMOS technology. Their operation is discussed and simulation results are reported.

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CMOS current/voltage mode winner-take-all circuit with spatial filtering

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