TY - GEN
T1 - Circuit Methods for the Integration of Low Voltage (1.1-1.8V) Analog Functions on System-on-a-Chip IC's in a Single Poly CMOS Process
AU - Koifman, V
AU - Afek, Y
AU - Shor, J.
N1 - Place of conference:USA
PY - 1999
Y1 - 1999
N2 - Several new building blocks are demonstrated, which enable low-power (1.1-1.8 V) analog functionality in a single-poly, digital CMOS process. These cells facilitate the integration of analog converters on system-on-a-chip IC's without adding any extra cost to the process. A voice A/D, designed with these circuits, exhibited an SNR of 68 dB at an analog supply voltage of 1.1 V, and 75 dB at 1..8 V. This is despite the noisy digital environment of an on-chip DSP operating at 60 MHz and a digital supply voltage of 2.5 V.
AB - Several new building blocks are demonstrated, which enable low-power (1.1-1.8 V) analog functionality in a single-poly, digital CMOS process. These cells facilitate the integration of analog converters on system-on-a-chip IC's without adding any extra cost to the process. A voice A/D, designed with these circuits, exhibited an SNR of 68 dB at an analog supply voltage of 1.1 V, and 75 dB at 1..8 V. This is despite the noisy digital environment of an on-chip DSP operating at 60 MHz and a digital supply voltage of 2.5 V.
UR - https://scholar.google.co.il/scholar?q=Circuit+Methods+for+the+Integration+of+Low+Voltage+%281.1-1.8V%29+Analog+Functions+on+System-on-a-Chip+IC%E2%80%99s+in+a+Single+Poly+CMOS+Process&btnG=&hl=en&as_sdt=0%2C5
M3 - Conference contribution
BT - In Low Power Electronics and Design, 1999. Proceedings. 1999 International Symposium on
PB - IEEE
ER -