Circuit methods for the integration of low voltage (1.1-1.8 V) analog functions on system-on-a-chip IC's in a single-poly CMOS processes

Vladimir Koifman, Yachin Afek, Joseph Shor

Research output: Contribution to conferencePaperpeer-review

1 Scopus citations

Abstract

Several new building blocks are demonstrated, which enable low-power (1.1-1.8 V) analog functionality in a single-poly, digital CMOS process. These cells facilitate the integration of analog converters on system-on-a-chip IC's without adding any extra cost to the process. A voice A/D, designed with these circuits, exhibited an SNR of 68 dB at an analog supply voltage of 1.1 V, and 75 dB at 1.8 V. This is despite the noisy digital environment of an on-chip DSP operating at 60 Mhz and a digital supply voltage of 2.5 V.

Original languageEnglish
Pages60-63
Number of pages4
DOIs
StatePublished - 1999
Externally publishedYes
EventProceedings of the 1999 International Conference on Low Power Electronics and Design (ISLPED) - San Diego, CA, USA
Duration: 16 Aug 199917 Aug 1999

Conference

ConferenceProceedings of the 1999 International Conference on Low Power Electronics and Design (ISLPED)
CitySan Diego, CA, USA
Period16/08/9917/08/99

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