Abstract
Several new building blocks are demonstrated, which enable low-power (1.1-1.8 V) analog functionality in a single-poly, digital CMOS process. These cells facilitate the integration of analog converters on system-on-a-chip IC's without adding any extra cost to the process. A voice A/D, designed with these circuits, exhibited an SNR of 68 dB at an analog supply voltage of 1.1 V, and 75 dB at 1.8 V. This is despite the noisy digital environment of an on-chip DSP operating at 60 Mhz and a digital supply voltage of 2.5 V.
Original language | English |
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Pages | 60-63 |
Number of pages | 4 |
DOIs | |
State | Published - 1999 |
Externally published | Yes |
Event | Proceedings of the 1999 International Conference on Low Power Electronics and Design (ISLPED) - San Diego, CA, USA Duration: 16 Aug 1999 → 17 Aug 1999 |
Conference
Conference | Proceedings of the 1999 International Conference on Low Power Electronics and Design (ISLPED) |
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City | San Diego, CA, USA |
Period | 16/08/99 → 17/08/99 |