CAD system for ASM and FSM synthesis

Samary Baranov

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

For hardware realization of computer programs (for the realization of software as hardware) it is very important to represent, to transform and to synthesize very complex Finite State Machines (FSM). This work contains the first report about CAD system Synthesis 1 for design of FSMs with hardly any constraints on their size, that is, the number of inputs, outputs and states. Synthesis 1 implements automatically various transformations of an Algorithmic State Machine (minimization, composition, decomposition etc.) and synthesis of FSM’s logic circuit as (a) multilevel circuit with gates from a predefined library; (b) with standard LSI and VLSI circuits without memory, such as PLA(s,t,q) — programmable logic arrays with s inputs, t outputs and q horizontals; (c) with standard LSI and VLSI circuits with memory, such as PLAM(s,t,q,r) — programmable logic arrays with s inputs, t outputs, q horizontals and r memory elements; (d) matrices circuits on the chip with a minimization of the chip area; (e) with LUTs (Look-Up-Tables) for FPGA technology.

Original languageEnglish
Title of host publicationField-Programmable Logic and Applications
Subtitle of host publicationFrom FPGAs to Computing Paradigm - 8th International Workshop, FPL 1998, Proceedings
EditorsReiner W. Hartenstein, Andres Keevallik
PublisherSpringer Verlag
Pages119-128
Number of pages10
ISBN (Print)3540649484, 9783540649489
DOIs
StatePublished - 1998
Externally publishedYes
Event8th International Workshop on Field-Programmable Logic and Applications, FPL 1998 - Tallinn, Estonia
Duration: 31 Aug 19983 Sep 1998

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume1482
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Conference

Conference8th International Workshop on Field-Programmable Logic and Applications, FPL 1998
Country/TerritoryEstonia
CityTallinn
Period31/08/983/09/98

Bibliographical note

Publisher Copyright:
© Springer-Verlag Berlin Heidelberg 1998.

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