Benchmarking of standard-cell based memories in the sub-V_T domain in 65-nm CMOS technology

Keyphrases

• 65nm CMOS 100%
• Standard Cell-based 100%
• Memory Architecture 60%
• Memory Access 40%
• Achievable Throughput 40%
• Monte Carlo 20%
• Model Building 20%
• Memory Block 20%
• SRAM Design 20%
• Gate-level 20%
• Ultralow Power Systems 20%
• Netlist 20%
• Minimum Energy 20%
• Circuit Simulation 20%
• Reliable Operation 20%
• Process Parameter Variation 20%
• Characterization Model 20%
• Minimum Voltage 20%
• Within-die 20%
• Full-custom 20%

Computer Science

• Memory Architecture 100%
• Memory Access 66%
• Extracted Data 33%
• Reliable Operation 33%
• Circuit Simulation 33%
• Process Parameter Variation 33%

Material Science

• Electronic Circuit 100%