Area and Energy-Efficient Complementary Dual-Modular Redundancy Dynamic Memory for Space Applications

Robert Giterman, Lior Atias, Adam Teman

Research output: Contribution to journalArticlepeer-review

29 Scopus citations

Abstract

The limited size and power budgets of space-bound systems often contradict the requirements for reliable circuit operation within high-radiation environments. In this paper, we propose the smallest solution for soft-error tolerant embedded memory yet to be presented. The proposed complementary dual-modular redundancy (CDMR) memory is based on a four-transistor dynamic memory core that internally stores complementary data values to provide an inherent per-bit error detection capability. By adding simple, low-overhead parity, an error-correction capability is added to the memory architecture for robust soft-error protection. The proposed memory was implemented in a 65-nm CMOS technology, displaying as much as a 3.5×1 smaller silicon footprint than other radiation-hardened bitcells. In addition, the CDMR memory consumes between 48% and 87% less standby power than other considered solutions across the entire operating region.

Original languageEnglish
Pages (from-to)502-509
Number of pages8
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume25
Issue number2
DOIs
StatePublished - Feb 2017

Bibliographical note

Publisher Copyright:
© 1993-2012 IEEE.

Keywords

  • Embedded dynamic random access memory (eDRAM)
  • gain cell
  • low power
  • radiation hardening
  • single event upset (SEU)
  • soft errors
  • space applications
  • static RAM (SRAM)

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