Arbitrary error detection in combinational circuits by using partitioning

Osnat Keren; Ilya Levin; Vladimir Ostrovsky; Beni Abramov

doi:10.1109/dft.2008.34

Arbitrary error detection in combinational circuits by using partitioning

Osnat Keren
, Ilya Levin
, Vladimir Ostrovsky
, Beni Abramov

Tel Aviv University

Research output: Contribution to journal › Conference article › peer-review

3 Scopus citations

Abstract

The paper presents a new technique for designing a concurrently checking combinational circuit. The technique is based on partitioning the circuit into two independent sub-circuits. It does not require any redundant coding variables; instead, it utilizes a sub-set of input variables. These variables are transferred directly into a checker providing the arbitrary error detection. The paper develops and studies a method for selecting an optimized sub-set of such variables. Benchmark results show efficiency of the proposed approach.

Original language	English
Article number	4641192
Pages (from-to)	361-369
Number of pages	9
Journal	Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
DOIs	https://doi.org/10.1109/dft.2008.34
State	Published - 2008
Event	23rd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2008 - Boston, MA, United States Duration: 1 Oct 2008 → 3 Oct 2008

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10.1109/dft.2008.34

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@article{fc7f923d41fb4b79a9b44c53ee412a76,

title = "Arbitrary error detection in combinational circuits by using partitioning",

abstract = "The paper presents a new technique for designing a concurrently checking combinational circuit. The technique is based on partitioning the circuit into two independent sub-circuits. It does not require any redundant coding variables; instead, it utilizes a sub-set of input variables. These variables are transferred directly into a checker providing the arbitrary error detection. The paper develops and studies a method for selecting an optimized sub-set of such variables. Benchmark results show efficiency of the proposed approach.",

author = "Osnat Keren and Ilya Levin and Vladimir Ostrovsky and Beni Abramov",

year = "2008",

doi = "10.1109/dft.2008.34",

language = "אנגלית",

pages = "361--369",

journal = "Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems",

issn = "1550-5774",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "23rd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2008 ; Conference date: 01-10-2008 Through 03-10-2008",

}

TY - JOUR

T1 - Arbitrary error detection in combinational circuits by using partitioning

AU - Keren, Osnat

AU - Levin, Ilya

AU - Ostrovsky, Vladimir

AU - Abramov, Beni

PY - 2008

Y1 - 2008

N2 - The paper presents a new technique for designing a concurrently checking combinational circuit. The technique is based on partitioning the circuit into two independent sub-circuits. It does not require any redundant coding variables; instead, it utilizes a sub-set of input variables. These variables are transferred directly into a checker providing the arbitrary error detection. The paper develops and studies a method for selecting an optimized sub-set of such variables. Benchmark results show efficiency of the proposed approach.

AB - The paper presents a new technique for designing a concurrently checking combinational circuit. The technique is based on partitioning the circuit into two independent sub-circuits. It does not require any redundant coding variables; instead, it utilizes a sub-set of input variables. These variables are transferred directly into a checker providing the arbitrary error detection. The paper develops and studies a method for selecting an optimized sub-set of such variables. Benchmark results show efficiency of the proposed approach.

UR - https://www.scopus.com/pages/publications/67649960492

U2 - 10.1109/dft.2008.34

DO - 10.1109/dft.2008.34

M3 - ???researchoutput.researchoutputtypes.contributiontojournal.conferencearticle???

AN - SCOPUS:67649960492

SN - 1550-5774

SP - 361

EP - 369

JO - Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems

JF - Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems

M1 - 4641192

T2 - 23rd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2008

Y2 - 1 October 2008 through 3 October 2008

ER -

Arbitrary error detection in combinational circuits by using partitioning

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