Abstract
In this paper, an analytical model for junctionless nanotube (JL NT) MOSFET has been developed. The analytical model for minimum central potential, threshold voltage and drain current has been developed by using variable separation method. These model expressions are further applied to analyse the Short Channel Effects (SCEs) of JL NT MOSFET. The electrical performance of proposed device has been investigated by varying different process parameters such as silicon nanotube thickness, gate oxide thickness, and gate length. All the results of developed models have been validated by comparing with so obtained simulated results from genius 3D device simulator of VisualTCAD for different device parameters. JL NT MOSFET with appropriate design parameters can be further explored for circuit applications.
| Original language | English |
|---|---|
| Pages (from-to) | 362-370 |
| Number of pages | 9 |
| Journal | Transactions on Electrical and Electronic Materials |
| Volume | 23 |
| Issue number | 4 |
| DOIs | |
| State | Published - Aug 2022 |
| Externally published | Yes |
Bibliographical note
Publisher Copyright:© 2021, The Korean Institute of Electrical and Electronic Material Engineers.
Funding
Raj Kumar acknowledges the UGC, INDIA for the financial assistance and UIET (ECE), Panjab University, Chandigarh for providing Lab facility. Raj Kumar acknowledges the UGC, INDIA for the financial assistance and UIET (ECE), Panjab University, Chandigarh for providing Lab facility.
| Funders | Funder number |
|---|---|
| Panjab University, Chandigarh | |
| UIET | |
| Chandigarh University | |
| University Grants Commission | |
| University Grants Committee |
Keywords
- Analytical model
- DIBL
- Drain current
- Junctionless
- Nanotube (NT)