Analysis of Strategies for Constructive General Block Placement

The problem of general block placement in VLSI is the topic of this paper. Among the existing approaches to its solution we concentrate on the constructive one, where blocks are selected and located one at a time. Two of the main features of the constructive approach are its high computational efficiency and its ability to support both automatic and interactive placement. We present some well-known strategies for the selection of the next block to be located, propose new ones and establish a methodology to evaluate them. We then show that the optimization problem arising in constructive placement can be reduced into several, much simpler, subproblems. Next, objective functions for locating the selected block to achieve a “good” layout are presented. We discuss objective functions of three different metrics: the squared Euclidean, rectilinear and Euclidean, obtain appropriate optimization problems and solve them analytically, using efficient computational schemes. These solutions have been implemented and are used in a real VLSI chip design environment. Finally, we show that the squared Euclidean and the rectilinear metrics are preferable to the Euclidean one.