TY - JOUR
T1 - An In-Depth Evaluation of Externally Amplified Coupling (EAC) Attacks - A Concrete Threat for Masked Cryptographic Implementations
AU - Gur, Ofek
AU - Gross, Tomer
AU - Bellizia, Davide
AU - Standaert, Francois Xavier
AU - Levi, Itamar
N1 - Publisher Copyright:
© 2004-2012 IEEE.
PY - 2023/2/1
Y1 - 2023/2/1
N2 - Masking is a systematic countermeasure to achieve side-channel security for cryptographic algorithms. However, its secure implementation relies on an independence assumption that can be violated by signal coupling. It has been established that coupling induced within a device can be detrimental. It was demonstrated on a 1st -order secure design (i.e., with two shares) that an adversary who can manipulate the design's power-measurement setup can externally induce significant coupling. It can thus concretely reduce the 'effective-security-order', i.e., make 1st -order leakages as significant as 2nd -order ones with fewer measurements. This paper explores the impact of such external amplification phenomena on fabricated hardware test cases for the first time. We designed a dedicated ASIC to extend the empirical results for demonstrating impact up to the 4th order. We have systematically evaluate d factors related to adversarial control, e.g., the external measurement resistance. We also investigate d their relative influence compared to intra-design ones, i.e., internal power-grid resistance and transistors' inherent resistance. Our study demonstrates that externally amplified coupling scale s up to concrete masked hardware designs with various amounts of shares and is not very sensitive to intra-design parameters. Therefore, providing experimental evidence that such coupling should be considered during masking validation.
AB - Masking is a systematic countermeasure to achieve side-channel security for cryptographic algorithms. However, its secure implementation relies on an independence assumption that can be violated by signal coupling. It has been established that coupling induced within a device can be detrimental. It was demonstrated on a 1st -order secure design (i.e., with two shares) that an adversary who can manipulate the design's power-measurement setup can externally induce significant coupling. It can thus concretely reduce the 'effective-security-order', i.e., make 1st -order leakages as significant as 2nd -order ones with fewer measurements. This paper explores the impact of such external amplification phenomena on fabricated hardware test cases for the first time. We designed a dedicated ASIC to extend the empirical results for demonstrating impact up to the 4th order. We have systematically evaluate d factors related to adversarial control, e.g., the external measurement resistance. We also investigate d their relative influence compared to intra-design ones, i.e., internal power-grid resistance and transistors' inherent resistance. Our study demonstrates that externally amplified coupling scale s up to concrete masked hardware designs with various amounts of shares and is not very sensitive to intra-design parameters. Therefore, providing experimental evidence that such coupling should be considered during masking validation.
KW - Coupling
KW - EAC
KW - effective security order
KW - externally-amplified-coupling
KW - masking
KW - side-channel analysis
UR - http://www.scopus.com/inward/record.url?scp=85144048722&partnerID=8YFLogxK
U2 - 10.1109/tcsi.2022.3222176
DO - 10.1109/tcsi.2022.3222176
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SN - 1549-8328
VL - 70
SP - 783
EP - 796
JO - IEEE Transactions on Circuits and Systems I: Regular Papers
JF - IEEE Transactions on Circuits and Systems I: Regular Papers
IS - 2
ER -