An energy-efficient graphics processor in 14-nm Tri-Gate CMOS featuring integrated voltage regulators for fine-grain DVFS, Retentive Sleep, and VMIN optimization

Pascal A. Meinerzhagen, Carlos Tokunaga, Andres Malavasi, Vaibhav Vaidya, Ashwin Mendon, D. Mathaikutty, Jaydeep Kulkarni, Charles Augustine, Minki Cho, Stephen T. Kim, George E. Matthew, Rinkle Jain, Joseph Ryan, Chung Ching Peng, Somnath Paul, Sriram Vangal, Brando Perez Esparza, L. Cuellar, M. Woodman, Bala IyerSubramaniam Maiyuran, G. Chinya, Xiang Zou, Yuyun Liao, Krishnan Ravichandran, H. Wang, Muhammad M. Khellah, James W. Tschanz, Vivek De

Research output: Contribution to journalArticlepeer-review

15 Scopus citations

Abstract

Graphics workloads make highly dynamic use of resources such as execution units (EUs), and thus can benefit from fast, fine-grain dynamic voltage and frequency scaling (DVFS) and retentive sleep. This paper presents a 14-nm graphics processing unit (GPU) prototype with modified EUs which include an integrated voltage regulator (IVR). The IVR enables energy-efficient EU turbo operation, data retention, and VMIN optimization per EU. Silicon measurements show that IVR-enabled EU turbo operation offers up to 32% (average 29%) energy reduction at constant performance.

Original languageEnglish
Article number8527541
Pages (from-to)144-157
Number of pages14
JournalIEEE Journal of Solid-State Circuits
Volume54
Issue number1
DOIs
StatePublished - Jan 2019
Externally publishedYes

Bibliographical note

Funding Information:
Manuscript received May 9, 2018; revised July 27, 2018 and September 27, 2018; accepted September 28, 2018. Date of publication November 8, 2018; date of current version January 14, 2019. This paper was approved by Guest Editor Masato Motomura. This work was supported by the U.S. Government (DARPA). (Corresponding author: Pascal A. Meinerzhagen.) The authors are with Intel Corporation, Hillsboro, OR 97124 USA (e-mail: pascal.a.meinerzhagen@intel.com).

Publisher Copyright:
© 1966-2012 IEEE.

Keywords

  • Energy-efficient graphics processing unit (GPU)
  • VMIN optimization
  • fine-grain dynamic voltage and frequency scaling (DVFS)
  • integrated voltage regulators (IVRs)
  • retentive sleep

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