Abstract
Graphics workloads are highly dynamic in nature, using multi-threaded SIMD execution units (EUs), fixed-function units, samplers, and media accelerators to provide ever-increasing amounts of graphics performance. These workloads are often limited by power and thermal constraints, requiring dynamic voltage/frequency scaling (DVFS) of the graphics processor (GPU). This coarse-grain DVFS, driven by a power-management IC (PMIC) setting a shared rail voltage (VIN), incurs performance loss while waiting for PLL re-lock and slow-rail voltage transitions. In addition, it does not allow a performance-critical unit (e.g. an EU) to use on demand a higher V/F (e.g. for EU turbo) without an energy penalty for the rest of the GPU.
Original language | English |
---|---|
Title of host publication | 2018 IEEE International Solid-State Circuits Conference, ISSCC 2018 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 38-40 |
Number of pages | 3 |
ISBN (Electronic) | 9781509049394 |
DOIs | |
State | Published - 8 Mar 2018 |
Externally published | Yes |
Event | 65th IEEE International Solid-State Circuits Conference, ISSCC 2018 - San Francisco, United States Duration: 11 Feb 2018 → 15 Feb 2018 |
Publication series
Name | Digest of Technical Papers - IEEE International Solid-State Circuits Conference |
---|---|
Volume | 61 |
ISSN (Print) | 0193-6530 |
Conference
Conference | 65th IEEE International Solid-State Circuits Conference, ISSCC 2018 |
---|---|
Country/Territory | United States |
City | San Francisco |
Period | 11/02/18 → 15/02/18 |
Bibliographical note
Publisher Copyright:© 2018 IEEE.
Funding
The authors thank the many members of the Intel Labs circuit research, microarchitecture research, and silicon/system prototyping teams that contributed to this work, as well as the Intel Visual and Parallel Computing Group. This research was, in part, funded by the U.S. Government (DARPA). The views and conclusions contained in this document are those of the authors and should not be interpreted as representing the official policies, either expressed or implied, of the U.S. Government.
Funders | Funder number |
---|---|
U.S. Government | |
Defense Advanced Research Projects Agency |