An efficient implementation of D-Flip-Flop using the GDI technique

Keyphrases

• Efficient Implementation 100%
• D Flip-flop 100%
• Gate Diffusion Input Technique 100%
• Gate Diffusion Input 60%
• Power Delay Product 40%
• Flip-flop Design 40%
• Performance Comparison 20%
• Design Techniques 20%
• Logic Design 20%
• Device Lag 20%
• Power Dissipation 20%
• Input Structure 20%
• Reducing Power 20%
• Device Power 20%

Engineering

• Efficient Implementation 100%
• Flip Flop Circuits 100%
• Simulation Result 20%
• Logic Design 20%
• Design Technique 20%
• Reducing Power 20%
• Energy Dissipation 20%