TY - JOUR
T1 - An 11uW, 0.08 mm2, 125dB-Dynamic-Range Current-Sensing Dynamic CT Zoom ADC
AU - Shifman, Yizhak
AU - Shor, Joseph
N1 - Publisher Copyright:
© 2024 IEEE.
PY - 2024
Y1 - 2024
N2 - A Dynamic Continuous-Time Zoom-ADC current to digital converter for bio-sensing applications is presented, comprising a current DAC (IDAC), a loop filter, a comparator, and loop logic. Within the IDAC, a reference voltage is driven to resistor legs, obtaining an accurate current with high Rout. A 1st order loop filter utilizes an inherently linear, zero-static-power, passive integrator. An isolation of the integrator from external sensor capacitance is obtained by a cascode transistor, enabling the use of the passive integrator. During the Zoom's SAR phase, a binary search detects the approximate signal level and provides zoomed references for the Sigma-Delta phase, where fine conversion is performed. The dynamic mode tracks the comparator output data to determine when the input signal is close to the references and updates them accordingly. This paper is the first to propose a dynamic zoom ADC which utilizes a single DAC. An over-voltage detector detects integrator voltages exceeding the supply level, a result of high input currents, and prevents damage to the circuit. A 65nm implementation achieved a competitive dynamic range of 125dB, an SNR of 91dB and an FoM of 192dB. The design occupies 0.08 mm2, and a state-of-the-art power consumption of 11.4uW was measured. The dynamic mode supports up to 78Hz inputs, and an SFDR of 90.4dB was measured.
AB - A Dynamic Continuous-Time Zoom-ADC current to digital converter for bio-sensing applications is presented, comprising a current DAC (IDAC), a loop filter, a comparator, and loop logic. Within the IDAC, a reference voltage is driven to resistor legs, obtaining an accurate current with high Rout. A 1st order loop filter utilizes an inherently linear, zero-static-power, passive integrator. An isolation of the integrator from external sensor capacitance is obtained by a cascode transistor, enabling the use of the passive integrator. During the Zoom's SAR phase, a binary search detects the approximate signal level and provides zoomed references for the Sigma-Delta phase, where fine conversion is performed. The dynamic mode tracks the comparator output data to determine when the input signal is close to the references and updates them accordingly. This paper is the first to propose a dynamic zoom ADC which utilizes a single DAC. An over-voltage detector detects integrator voltages exceeding the supply level, a result of high input currents, and prevents damage to the circuit. A 65nm implementation achieved a competitive dynamic range of 125dB, an SNR of 91dB and an FoM of 192dB. The design occupies 0.08 mm2, and a state-of-the-art power consumption of 11.4uW was measured. The dynamic mode supports up to 78Hz inputs, and an SFDR of 90.4dB was measured.
KW - Current sensor
KW - current to digital converter
KW - zoom ADC
UR - http://www.scopus.com/inward/record.url?scp=85195418107&partnerID=8YFLogxK
U2 - 10.1109/tcsi.2024.3404860
DO - 10.1109/tcsi.2024.3404860
M3 - ???researchoutput.researchoutputtypes.contributiontojournal.article???
AN - SCOPUS:85195418107
SN - 1549-8328
VL - 71
SP - 3489
EP - 3501
JO - IEEE Transactions on Circuits and Systems I: Regular Papers
JF - IEEE Transactions on Circuits and Systems I: Regular Papers
IS - 8
ER -