An all-analog high-speed decoding technique is described which is suitable for magnetic recording (MR) and other computationally demanding applications. A decoder for a binary (18,9,5) tail-biting trellis code, which is much simpler than the codes used for MR, has been chosen to demonstrate this technique. It achieves a decoding rate of 100 Mbit/s at a single 5V power supply. The power consumption is 50mW. Higher speed can essentially be traded for higher power consumption. A comparison shows that a digital implementation is outperformed by more than two orders of magnitude in terms of speed and/or power consumption.
|Number of pages||4|
|Journal||European Solid-State Circuits Conference|
|State||Published - 1999|
|Event||25th European Solid-State Circuits Conference, ESSCIRC 1999 - Duisburg, Germany|
Duration: 21 Sep 1999 → 23 Sep 1999