Abstract
Sparse matrix by vector multiplication (SpMV) plays a pivotal role in machine learning and data mining. We propose and investigate an SpMV accelerator, specifically designed to accelerate the sparse matrix by sparse vector multiplication (SpMSpV), and to be integrated in a CPU core. We show that our accelerator outperforms a similar solution by 70x while achieving 8x higher power efficiency, which yields an estimated 29x energy reduction for SpMSpV based applications.
| Original language | English |
|---|---|
| Pages (from-to) | 21-24 |
| Number of pages | 4 |
| Journal | IEEE Computer Architecture Letters |
| Volume | 17 |
| Issue number | 1 |
| DOIs | |
| State | Published - 1 Jan 2018 |
| Externally published | Yes |
Bibliographical note
Publisher Copyright:© 2017 IEEE.
Keywords
- SpMV
- Sparse matrix multiplication
- accelerator
- sparse matrix by sparse vector multiplication
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