TY - GEN
T1 - A transient noise analysis of secured dual-rail based logic style
AU - Nawaz, Kashif
AU - Levi, Itamar
AU - Standaert, Francois Xavier
AU - Flandre, Denis
N1 - Publisher Copyright:
© 2018 IEEE.
PY - 2018/12/10
Y1 - 2018/12/10
N2 - Dual-rail logic circuits have been used as an effective countermeasure towards a more secure circuit design. However, with technology scaling and lowering of V DD , they lose interest as the signal reduction is less significant compared to CMOS. In this work, we revisit dual-rail logic designs (more specifically DDSLL) while focusing on intrinsic physical device noise using a transient noise analysis methodology and show that there exists a potential for such circuits to reduce the signal and concretely increase the noise. Our analysis, which extends to meaningful cryptographic figures-of-merit (FoMs) such as the SNR (Signal-to-Noise ratio) and Mutual-Information (MI), better clarifies the potential of DDSLL circuits to leverage the noise.
AB - Dual-rail logic circuits have been used as an effective countermeasure towards a more secure circuit design. However, with technology scaling and lowering of V DD , they lose interest as the signal reduction is less significant compared to CMOS. In this work, we revisit dual-rail logic designs (more specifically DDSLL) while focusing on intrinsic physical device noise using a transient noise analysis methodology and show that there exists a potential for such circuits to reduce the signal and concretely increase the noise. Our analysis, which extends to meaningful cryptographic figures-of-merit (FoMs) such as the SNR (Signal-to-Noise ratio) and Mutual-Information (MI), better clarifies the potential of DDSLL circuits to leverage the noise.
UR - http://www.scopus.com/inward/record.url?scp=85060198775&partnerID=8YFLogxK
U2 - 10.1109/ngcas.2018.8572199
DO - 10.1109/ngcas.2018.8572199
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T3 - 2018 New Generation of CAS, NGCAS 2018
SP - 146
EP - 149
BT - 2018 New Generation of CAS, NGCAS 2018
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2018 New Generation of CAS, NGCAS 2018
Y2 - 20 November 2018 through 23 November 2018
ER -