Abstract
This paper presents a self-biased subthreshold voltage reference with several types of trimming options. A current trim is used to achieve similar currents across process corners. A coarse/fine voltage trim was implemented, which utilized different Vth's of the process as well as the reverse short-channel effect. The range of voltages obtained vary from 86mV to 536mV with steps of 16mV. The circuit was designed in a standard 0.18 μm CMOS process. Simulation results at Vcc=1V shows a temperature coefficient (TC) between 40 to 400 ppm/oC at different trims over a 120oC range. The nominal power consumption was 1.35nW with a highly compact area of 0.002
| Original language | English |
|---|---|
| Title of host publication | 2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| ISBN (Electronic) | 9781728192017 |
| DOIs | |
| State | Published - 2021 |
| Event | 53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Daegu, Korea, Republic of Duration: 22 May 2021 → 28 May 2021 |
Publication series
| Name | Proceedings - IEEE International Symposium on Circuits and Systems |
|---|---|
| Volume | 2021-May |
| ISSN (Print) | 0271-4310 |
Conference
| Conference | 53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 |
|---|---|
| Country/Territory | Korea, Republic of |
| City | Daegu |
| Period | 22/05/21 → 28/05/21 |
Bibliographical note
Publisher Copyright:© 2021 IEEE
Funding
ACKNOWLEDGMENTS We acknowledge the support of Toga Semiconductor.
Keywords
- Analog design
- CMOS
- Reference voltages
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