A subthreshold voltage reference with coarse-fine voltage trimming

David Zagouri; Joseph Shor

doi:10.1109/ISCAS51556.2021.9401701

A subthreshold voltage reference with coarse-fine voltage trimming

David Zagouri, Joseph Shor

Bar-Ilan University - The Alexander Kofkin Faculty of Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

5 Scopus citations

Abstract

This paper presents a self-biased subthreshold voltage reference with several types of trimming options. A current trim is used to achieve similar currents across process corners. A coarse/fine voltage trim was implemented, which utilized different Vth's of the process as well as the reverse short-channel effect. The range of voltages obtained vary from 86mV to 536mV with steps of 16mV. The circuit was designed in a standard 0.18 μm CMOS process. Simulation results at Vcc=1V shows a temperature coefficient (TC) between 40 to 400 ppm/^oC at different trims over a 120^oC range. The nominal power consumption was 1.35nW with a highly compact area of 0.002

Original language	English
Title of host publication	2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781728192017
DOIs	https://doi.org/10.1109/ISCAS51556.2021.9401701
State	Published - 2021
Event	53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Daegu, Korea, Republic of Duration: 22 May 2021 → 28 May 2021

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	2021-May
ISSN (Print)	0271-4310

Conference

Conference	53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021
Country/Territory	Korea, Republic of
City	Daegu
Period	22/05/21 → 28/05/21

Bibliographical note

Publisher Copyright:
© 2021 IEEE

Keywords

Analog design
CMOS
Reference voltages

Access to Document

10.1109/ISCAS51556.2021.9401701

Cite this

Zagouri, D., & Shor, J. (2021). A subthreshold voltage reference with coarse-fine voltage trimming. In 2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings Article 9401701 (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2021-May). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS51556.2021.9401701

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abstract = "This paper presents a self-biased subthreshold voltage reference with several types of trimming options. A current trim is used to achieve similar currents across process corners. A coarse/fine voltage trim was implemented, which utilized different Vth's of the process as well as the reverse short-channel effect. The range of voltages obtained vary from 86mV to 536mV with steps of 16mV. The circuit was designed in a standard 0.18 μm CMOS process. Simulation results at Vcc=1V shows a temperature coefficient (TC) between 40 to 400 ppm/oC at different trims over a 120oC range. The nominal power consumption was 1.35nW with a highly compact area of 0.002",

keywords = "Analog design, CMOS, Reference voltages",

author = "David Zagouri and Joseph Shor",

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year = "2021",

doi = "10.1109/ISCAS51556.2021.9401701",

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Zagouri, D & Shor, J 2021, A subthreshold voltage reference with coarse-fine voltage trimming. in 2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings., 9401701, Proceedings - IEEE International Symposium on Circuits and Systems, vol. 2021-May, Institute of Electrical and Electronics Engineers Inc., 53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021, Daegu, Korea, Republic of, 22/05/21. https://doi.org/10.1109/ISCAS51556.2021.9401701

A subthreshold voltage reference with coarse-fine voltage trimming. / Zagouri, David; Shor, Joseph.
2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2021. 9401701 (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2021-May).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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N2 - This paper presents a self-biased subthreshold voltage reference with several types of trimming options. A current trim is used to achieve similar currents across process corners. A coarse/fine voltage trim was implemented, which utilized different Vth's of the process as well as the reverse short-channel effect. The range of voltages obtained vary from 86mV to 536mV with steps of 16mV. The circuit was designed in a standard 0.18 μm CMOS process. Simulation results at Vcc=1V shows a temperature coefficient (TC) between 40 to 400 ppm/oC at different trims over a 120oC range. The nominal power consumption was 1.35nW with a highly compact area of 0.002

AB - This paper presents a self-biased subthreshold voltage reference with several types of trimming options. A current trim is used to achieve similar currents across process corners. A coarse/fine voltage trim was implemented, which utilized different Vth's of the process as well as the reverse short-channel effect. The range of voltages obtained vary from 86mV to 536mV with steps of 16mV. The circuit was designed in a standard 0.18 μm CMOS process. Simulation results at Vcc=1V shows a temperature coefficient (TC) between 40 to 400 ppm/oC at different trims over a 120oC range. The nominal power consumption was 1.35nW with a highly compact area of 0.002

KW - Analog design

KW - CMOS

KW - Reference voltages

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A subthreshold voltage reference with coarse-fine voltage trimming

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