Abstract
Embedded memories often constitute over 50% of the total silicon area and are the main consumer of static power in ultra-low power (ULP) applications. Operation at sub-threshold supply voltages can significantly reduce the power dissipation of memory arrays, however it also results in lower noise margins and much higher susceptibility to radiation effects, such as soft errors or single event upsets (SEU).
Original language | English |
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Title of host publication | 2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2015 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
ISBN (Electronic) | 9781509002597 |
DOIs | |
State | Published - 20 Nov 2015 |
Event | IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2015 - Rohnert Park, United States Duration: 5 Oct 2015 → 8 Oct 2015 |
Publication series
Name | 2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2015 |
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Conference
Conference | IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2015 |
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Country/Territory | United States |
City | Rohnert Park |
Period | 5/10/15 → 8/10/15 |
Bibliographical note
Publisher Copyright:© 2015 IEEE.