A Multirate Transceiver IC for Four-Wire Full-Duplex Data Transmission

Ken Buttle; Hiroshi Takatori; Cheng Chung Shih; Haim Shafir

doi:10.1109/4.104186

A Multirate Transceiver IC for Four-Wire Full-Duplex Data Transmission

Ken Buttle, Hiroshi Takatori, Cheng Chung Shih, Haim Shafir

Level One Communications, Inc.

Research output: Contribution to journal › Article › peer-review

2 Scopus citations

Abstract

A CMOS IC transceiver for full-duplex data transmission at 14 data rates is described. At the highest rate of 72 kb/s, two of these chips communicate on a four-wire twisted-pair telephone loop with loss at 36 kHz of up to 48 dB. The chip performs all line driving, timing recovery, and data recovery functions with only 11 passive external line interface components. The transceiver can converge on all Digital Data Service (DDS) lines, sending and receiving unscrambled data without the need for a training sequence. The chip is fabricated in a 2-μm, double-polysilicon, double-metal process with an area of 49 mm². Power consumption is 200 mW from the single 5-V supply.

Original language	English
Pages (from-to)	1928-1935
Number of pages	8
Journal	IEEE Journal of Solid-State Circuits
Volume	26
Issue number	12
DOIs	https://doi.org/10.1109/4.104186
State	Published - Dec 1991
Externally published	Yes

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title = "A Multirate Transceiver IC for Four-Wire Full-Duplex Data Transmission",

abstract = "A CMOS IC transceiver for full-duplex data transmission at 14 data rates is described. At the highest rate of 72 kb/s, two of these chips communicate on a four-wire twisted-pair telephone loop with loss at 36 kHz of up to 48 dB. The chip performs all line driving, timing recovery, and data recovery functions with only 11 passive external line interface components. The transceiver can converge on all Digital Data Service (DDS) lines, sending and receiving unscrambled data without the need for a training sequence. The chip is fabricated in a 2-μm, double-polysilicon, double-metal process with an area of 49 mm2. Power consumption is 200 mW from the single 5-V supply.",

author = "Ken Buttle and Hiroshi Takatori and Shih, {Cheng Chung} and Haim Shafir",

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N2 - A CMOS IC transceiver for full-duplex data transmission at 14 data rates is described. At the highest rate of 72 kb/s, two of these chips communicate on a four-wire twisted-pair telephone loop with loss at 36 kHz of up to 48 dB. The chip performs all line driving, timing recovery, and data recovery functions with only 11 passive external line interface components. The transceiver can converge on all Digital Data Service (DDS) lines, sending and receiving unscrambled data without the need for a training sequence. The chip is fabricated in a 2-μm, double-polysilicon, double-metal process with an area of 49 mm2. Power consumption is 200 mW from the single 5-V supply.

AB - A CMOS IC transceiver for full-duplex data transmission at 14 data rates is described. At the highest rate of 72 kb/s, two of these chips communicate on a four-wire twisted-pair telephone loop with loss at 36 kHz of up to 48 dB. The chip performs all line driving, timing recovery, and data recovery functions with only 11 passive external line interface components. The transceiver can converge on all Digital Data Service (DDS) lines, sending and receiving unscrambled data without the need for a training sequence. The chip is fabricated in a 2-μm, double-polysilicon, double-metal process with an area of 49 mm2. Power consumption is 200 mW from the single 5-V supply.

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A Multirate Transceiver IC for Four-Wire Full-Duplex Data Transmission

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