A multi-turn twisted inductor for on-chip cross-talk reduction

Peter Martin; Richard Horn; Kobi Ben Atar

doi:10.1109/icsee.2016.7806138

A multi-turn twisted inductor for on-chip cross-talk reduction

Peter Martin, Richard Horn, Kobi Ben Atar

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

5 Scopus citations

Abstract

A Fully symmetric multi-turn twisted inductor is presented for the suppression of on-chip interference in the transmit chain of a LTE transceiver chip implemented in TSMC 65nm CMOS process. The inductor is ultra-compact, symmetrical and presents up to ×3 inductance density as compared to a standard spiral inductor. Magnetic coupling reduction of more than 12dB was measured and EM simulation results validate the design procedure. A simple and accurate closed form expression for the inductance estimation is introduced for the first time in the context of planar twisted-inductors to simplify the design process.

Original language	English
Title of host publication	2016 IEEE International Conference on the Science of Electrical Engineering, ICSEE 2016
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781509021529
DOIs	https://doi.org/10.1109/icsee.2016.7806138
State	Published - 4 Jan 2017
Externally published	Yes
Event	2016 IEEE International Conference on the Science of Electrical Engineering, ICSEE 2016 - Eilat, Israel Duration: 16 Nov 2016 → 18 Nov 2016

Publication series

Name	2016 IEEE International Conference on the Science of Electrical Engineering, ICSEE 2016

Conference

Conference	2016 IEEE International Conference on the Science of Electrical Engineering, ICSEE 2016
Country/Territory	Israel
City	Eilat
Period	16/11/16 → 18/11/16

Bibliographical note

Publisher Copyright:
© 2016 IEEE.

Keywords

Figure-8 inductor
Injection-Lock Divider
Twisted-Inductor
closed-form inductance expression
crosstalk

Access to Document

10.1109/icsee.2016.7806138

Cite this

Martin, P., Horn, R., & Ben Atar, K. (2017). A multi-turn twisted inductor for on-chip cross-talk reduction. In 2016 IEEE International Conference on the Science of Electrical Engineering, ICSEE 2016 Article 7806138 (2016 IEEE International Conference on the Science of Electrical Engineering, ICSEE 2016). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/icsee.2016.7806138

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abstract = "A Fully symmetric multi-turn twisted inductor is presented for the suppression of on-chip interference in the transmit chain of a LTE transceiver chip implemented in TSMC 65nm CMOS process. The inductor is ultra-compact, symmetrical and presents up to ×3 inductance density as compared to a standard spiral inductor. Magnetic coupling reduction of more than 12dB was measured and EM simulation results validate the design procedure. A simple and accurate closed form expression for the inductance estimation is introduced for the first time in the context of planar twisted-inductors to simplify the design process.",

keywords = "Figure-8 inductor, Injection-Lock Divider, Twisted-Inductor, closed-form inductance expression, crosstalk",

author = "Peter Martin and Richard Horn and \{Ben Atar\}, Kobi",

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doi = "10.1109/icsee.2016.7806138",

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Martin, P, Horn, R & Ben Atar, K 2017, A multi-turn twisted inductor for on-chip cross-talk reduction. in 2016 IEEE International Conference on the Science of Electrical Engineering, ICSEE 2016., 7806138, 2016 IEEE International Conference on the Science of Electrical Engineering, ICSEE 2016, Institute of Electrical and Electronics Engineers Inc., 2016 IEEE International Conference on the Science of Electrical Engineering, ICSEE 2016, Eilat, Israel, 16/11/16. https://doi.org/10.1109/icsee.2016.7806138

A multi-turn twisted inductor for on-chip cross-talk reduction. / Martin, Peter; Horn, Richard; Ben Atar, Kobi.
2016 IEEE International Conference on the Science of Electrical Engineering, ICSEE 2016. Institute of Electrical and Electronics Engineers Inc., 2017. 7806138 (2016 IEEE International Conference on the Science of Electrical Engineering, ICSEE 2016).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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N2 - A Fully symmetric multi-turn twisted inductor is presented for the suppression of on-chip interference in the transmit chain of a LTE transceiver chip implemented in TSMC 65nm CMOS process. The inductor is ultra-compact, symmetrical and presents up to ×3 inductance density as compared to a standard spiral inductor. Magnetic coupling reduction of more than 12dB was measured and EM simulation results validate the design procedure. A simple and accurate closed form expression for the inductance estimation is introduced for the first time in the context of planar twisted-inductors to simplify the design process.

AB - A Fully symmetric multi-turn twisted inductor is presented for the suppression of on-chip interference in the transmit chain of a LTE transceiver chip implemented in TSMC 65nm CMOS process. The inductor is ultra-compact, symmetrical and presents up to ×3 inductance density as compared to a standard spiral inductor. Magnetic coupling reduction of more than 12dB was measured and EM simulation results validate the design procedure. A simple and accurate closed form expression for the inductance estimation is introduced for the first time in the context of planar twisted-inductors to simplify the design process.

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KW - Twisted-Inductor

KW - closed-form inductance expression

KW - crosstalk

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Martin P, Horn R, Ben Atar K. A multi-turn twisted inductor for on-chip cross-talk reduction. In 2016 IEEE International Conference on the Science of Electrical Engineering, ICSEE 2016. Institute of Electrical and Electronics Engineers Inc. 2017. 7806138. (2016 IEEE International Conference on the Science of Electrical Engineering, ICSEE 2016). doi: 10.1109/icsee.2016.7806138

A multi-turn twisted inductor for on-chip cross-talk reduction

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Bibliographical note

Keywords

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