A multi-turn twisted inductor for on-chip cross-talk reduction

Peter Martin, Richard Horn, Kobi Ben Atar

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

A Fully symmetric multi-turn twisted inductor is presented for the suppression of on-chip interference in the transmit chain of a LTE transceiver chip implemented in TSMC 65nm CMOS process. The inductor is ultra-compact, symmetrical and presents up to ×3 inductance density as compared to a standard spiral inductor. Magnetic coupling reduction of more than 12dB was measured and EM simulation results validate the design procedure. A simple and accurate closed form expression for the inductance estimation is introduced for the first time in the context of planar twisted-inductors to simplify the design process.

Original languageEnglish
Title of host publication2016 IEEE International Conference on the Science of Electrical Engineering, ICSEE 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509021529
DOIs
StatePublished - 4 Jan 2017
Externally publishedYes
Event2016 IEEE International Conference on the Science of Electrical Engineering, ICSEE 2016 - Eilat, Israel
Duration: 16 Nov 201618 Nov 2016

Publication series

Name2016 IEEE International Conference on the Science of Electrical Engineering, ICSEE 2016

Conference

Conference2016 IEEE International Conference on the Science of Electrical Engineering, ICSEE 2016
Country/TerritoryIsrael
CityEilat
Period16/11/1618/11/16

Bibliographical note

Publisher Copyright:
© 2016 IEEE.

Keywords

  • Figure-8 inductor
  • Injection-Lock Divider
  • Twisted-Inductor
  • closed-form inductance expression
  • crosstalk

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