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Abstract
One of the main obstacles delaying a more widespread use of radio frequency identification (RFID) tags is cost. A critical element of any RFID system is a low power embedded non-volatile memory (NVM) that can be fabricated without additional masks to the core CMOS process. In this paper, we present a 256-bit re-writeable NVM array, implemented in the TowerJazz 0.18μm CMOS process using only standard logic process steps and masks. Based on the single-poly C-Flash bitcell, this array achieves an extremely low static power figure of 3.8μW during operation cycles.
Original language | English |
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Pages | 1827-1830 |
Number of pages | 4 |
DOIs | |
State | Published - 2012 |
Externally published | Yes |
Event | 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 - Seoul, Korea, Republic of Duration: 20 May 2012 → 23 May 2012 |
Conference
Conference | 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 |
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Country/Territory | Korea, Republic of |
City | Seoul |
Period | 20/05/12 → 23/05/12 |
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2012 IEEE International Symposium on Circuits and Systems
Teman, A. (Participation - Conference participant)
20 May 2012 → 23 May 2012Activity: Participating in or organizing an event › Organizing a conference, workshop, ...