A 2.6 mV/b Resolution, 1.2 GHz Throughput, All-Digital Voltage Droop Monitor Using Coupled Ring Oscillators in Intel 4 CMOS

C. Augustine; P. Meinerzhagen; W. Lim; A. Veerabathini; M. Bright; K. Mojjada; J. Tschanz; M. Khellah; V. De

doi:10.23919/VLSITechnologyandCir57934.2023.10185254

A 2.6 mV/b Resolution, 1.2 GHz Throughput, All-Digital Voltage Droop Monitor Using Coupled Ring Oscillators in Intel 4 CMOS

C. Augustine
, P. Meinerzhagen
, W. Lim
, A. Veerabathini
, M. Bright
, K. Mojjada
, J. Tschanz
, M. Khellah
, V. De

Intel

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

3 Scopus citations

Abstract

We present an all-digital voltage droop monitor (VDM) with coupled ring-oscillators (CoRO) for accurate in-situ droop monitoring every clock cycle. Measurements from a 3.2mm2 testchip in Intel 4 CMOS containing 9 3-way CoRO and baseline RO VDMs demonstrate 3X improvement in CoRO resolution (∼ 2.6 mV/b) over the baseline. In addition, measurements show 3 σ uncertainty (repeatability) error of CoRO VDM (+/-9mV) is ∼25 % lower than the baseline. The overall droop detection error improvements achieved by CoRO VDM are 12mV, 15mV and 17mV, respectively, depending on the type of calibration used - per instance/temperature/die, per temperature/die, or per die. This corresponds to associated IP power savings of 2.9%, 3.2% and 3.7% during functional use.

Original language	English
Title of host publication	2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9784863488069
DOIs	https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185254
State	Published - 2023
Externally published	Yes
Event	2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023 - Kyoto, Japan Duration: 11 Jun 2023 → 16 Jun 2023

Publication series

Name	Digest of Technical Papers - Symposium on VLSI Technology
Volume	2023-June
ISSN (Print)	0743-1562

Conference

Conference	2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023
Country/Territory	Japan
City	Kyoto
Period	11/06/23 → 16/06/23

Bibliographical note

Publisher Copyright:
© 2023 JSAP.

Access to Document

10.23919/VLSITechnologyandCir57934.2023.10185254

Cite this

Augustine, C., Meinerzhagen, P., Lim, W., Veerabathini, A., Bright, M., Mojjada, K., Tschanz, J., Khellah, M., & De, V. (2023). A 2.6 mV/b Resolution, 1.2 GHz Throughput, All-Digital Voltage Droop Monitor Using Coupled Ring Oscillators in Intel 4 CMOS. In 2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023 (Digest of Technical Papers - Symposium on VLSI Technology; Vol. 2023-June). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185254

Augustine, C. ; Meinerzhagen, P. ; Lim, W. et al. / A 2.6 mV/b Resolution, 1.2 GHz Throughput, All-Digital Voltage Droop Monitor Using Coupled Ring Oscillators in Intel 4 CMOS. 2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023. Institute of Electrical and Electronics Engineers Inc., 2023. (Digest of Technical Papers - Symposium on VLSI Technology).

@inproceedings{b09d32fb9070470dbf773f712eb047ac,

title = "A 2.6 mV/b Resolution, 1.2 GHz Throughput, All-Digital Voltage Droop Monitor Using Coupled Ring Oscillators in Intel 4 CMOS",

abstract = "We present an all-digital voltage droop monitor (VDM) with coupled ring-oscillators (CoRO) for accurate in-situ droop monitoring every clock cycle. Measurements from a 3.2mm2 testchip in Intel 4 CMOS containing 9 3-way CoRO and baseline RO VDMs demonstrate 3X improvement in CoRO resolution (∼ 2.6 mV/b) over the baseline. In addition, measurements show 3 σ uncertainty (repeatability) error of CoRO VDM (+/-9mV) is ∼25 \% lower than the baseline. The overall droop detection error improvements achieved by CoRO VDM are 12mV, 15mV and 17mV, respectively, depending on the type of calibration used - per instance/temperature/die, per temperature/die, or per die. This corresponds to associated IP power savings of 2.9\%, 3.2\% and 3.7\% during functional use.",

author = "C. Augustine and P. Meinerzhagen and W. Lim and A. Veerabathini and M. Bright and K. Mojjada and J. Tschanz and M. Khellah and V. De",

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year = "2023",

doi = "10.23919/VLSITechnologyandCir57934.2023.10185254",

language = "אנגלית",

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Augustine, C, Meinerzhagen, P, Lim, W, Veerabathini, A, Bright, M, Mojjada, K, Tschanz, J, Khellah, M & De, V 2023, A 2.6 mV/b Resolution, 1.2 GHz Throughput, All-Digital Voltage Droop Monitor Using Coupled Ring Oscillators in Intel 4 CMOS. in 2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023. Digest of Technical Papers - Symposium on VLSI Technology, vol. 2023-June, Institute of Electrical and Electronics Engineers Inc., 2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023, Kyoto, Japan, 11/06/23. https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185254

A 2.6 mV/b Resolution, 1.2 GHz Throughput, All-Digital Voltage Droop Monitor Using Coupled Ring Oscillators in Intel 4 CMOS. / Augustine, C.; Meinerzhagen, P.; Lim, W. et al.
2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023. Institute of Electrical and Electronics Engineers Inc., 2023. (Digest of Technical Papers - Symposium on VLSI Technology; Vol. 2023-June).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Augustine, C.

AU - Meinerzhagen, P.

AU - Lim, W.

AU - Veerabathini, A.

AU - Bright, M.

AU - Mojjada, K.

AU - Tschanz, J.

AU - Khellah, M.

AU - De, V.

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N2 - We present an all-digital voltage droop monitor (VDM) with coupled ring-oscillators (CoRO) for accurate in-situ droop monitoring every clock cycle. Measurements from a 3.2mm2 testchip in Intel 4 CMOS containing 9 3-way CoRO and baseline RO VDMs demonstrate 3X improvement in CoRO resolution (∼ 2.6 mV/b) over the baseline. In addition, measurements show 3 σ uncertainty (repeatability) error of CoRO VDM (+/-9mV) is ∼25 % lower than the baseline. The overall droop detection error improvements achieved by CoRO VDM are 12mV, 15mV and 17mV, respectively, depending on the type of calibration used - per instance/temperature/die, per temperature/die, or per die. This corresponds to associated IP power savings of 2.9%, 3.2% and 3.7% during functional use.

AB - We present an all-digital voltage droop monitor (VDM) with coupled ring-oscillators (CoRO) for accurate in-situ droop monitoring every clock cycle. Measurements from a 3.2mm2 testchip in Intel 4 CMOS containing 9 3-way CoRO and baseline RO VDMs demonstrate 3X improvement in CoRO resolution (∼ 2.6 mV/b) over the baseline. In addition, measurements show 3 σ uncertainty (repeatability) error of CoRO VDM (+/-9mV) is ∼25 % lower than the baseline. The overall droop detection error improvements achieved by CoRO VDM are 12mV, 15mV and 17mV, respectively, depending on the type of calibration used - per instance/temperature/die, per temperature/die, or per die. This corresponds to associated IP power savings of 2.9%, 3.2% and 3.7% during functional use.

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ER -

Augustine C, Meinerzhagen P, Lim W, Veerabathini A, Bright M, Mojjada K et al. A 2.6 mV/b Resolution, 1.2 GHz Throughput, All-Digital Voltage Droop Monitor Using Coupled Ring Oscillators in Intel 4 CMOS. In 2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023. Institute of Electrical and Electronics Engineers Inc. 2023. (Digest of Technical Papers - Symposium on VLSI Technology). doi: 10.23919/VLSITechnologyandCir57934.2023.10185254

A 2.6 mV/b Resolution, 1.2 GHz Throughput, All-Digital Voltage Droop Monitor Using Coupled Ring Oscillators in Intel 4 CMOS

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