A 2.6 mV/b Resolution, 1.2 GHz Throughput, All-Digital Voltage Droop Monitor Using Coupled Ring Oscillators in Intel 4 CMOS

C. Augustine, P. Meinerzhagen, W. Lim, A. Veerabathini, M. Bright, K. Mojjada, J. Tschanz, M. Khellah, V. De

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

We present an all-digital voltage droop monitor (VDM) with coupled ring-oscillators (CoRO) for accurate in-situ droop monitoring every clock cycle. Measurements from a 3.2mm2 testchip in Intel 4 CMOS containing 9 3-way CoRO and baseline RO VDMs demonstrate 3X improvement in CoRO resolution (∼ 2.6 mV/b) over the baseline. In addition, measurements show 3 σ uncertainty (repeatability) error of CoRO VDM (+/-9mV) is ∼25 % lower than the baseline. The overall droop detection error improvements achieved by CoRO VDM are 12mV, 15mV and 17mV, respectively, depending on the type of calibration used - per instance/temperature/die, per temperature/die, or per die. This corresponds to associated IP power savings of 2.9%, 3.2% and 3.7% during functional use.

Original languageEnglish
Title of host publication2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9784863488069
DOIs
StatePublished - 2023
Externally publishedYes
Event2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023 - Kyoto, Japan
Duration: 11 Jun 202316 Jun 2023

Publication series

NameDigest of Technical Papers - Symposium on VLSI Technology
Volume2023-June
ISSN (Print)0743-1562

Conference

Conference2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023
Country/TerritoryJapan
CityKyoto
Period11/06/2316/06/23

Bibliographical note

Publisher Copyright:
© 2023 JSAP.

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