A 14.3pW sub-threshold 2T gain-cell eDRAM for ultra-low power IoT applications in 28nm FD-SOI

Robert Giterman; Adam Teman; Alexander Fish

doi:10.1109/S3S.2018.8640130

A 14.3pW sub-threshold 2T gain-cell eDRAM for ultra-low power IoT applications in 28nm FD-SOI

Robert Giterman
, Adam Teman
, Alexander Fish

Bar-Ilan University - The Alexander Kofkin Faculty of Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

4 Scopus citations

Abstract

Internet of Things (IoT) applications, such as biomedical sensing, often require on-chip embedded memories, which dominate both the silicon area and power of these applications [1, 2]. To adhere to the ultra-low power (ULP) requirements of IoT applications, supply voltage ( V_DD)scaling down to the sub-threshold voltage ( V_T)region can be used to significantly reduce both the static and dynamic power consumption of these applications. However, embedded memories, typically implemented with 6T SRAM macros, suffer from decreased noise margins and become unreliable at near-V_Tsupply voltages [2-4].

Original language	English
Title of host publication	2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781538676264
DOIs	https://doi.org/10.1109/S3S.2018.8640130
State	Published - 2 Jul 2018
Event	2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018 - Burlingame, United States Duration: 15 Oct 2018 → 18 Oct 2018

Publication series

Name	2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018

Conference

Conference	2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018
Country/Territory	United States
City	Burlingame
Period	15/10/18 → 18/10/18

Bibliographical note

Publisher Copyright:
© 2018 IEEE.

Funding

ACKNOWLEDGEMENTS The work of A. Fish was supported by the Israeli Ministry of Science under Grant 3-14345.

Funders	Funder number
Israeli Ministry of Science	3-14345

Access to Document

10.1109/S3S.2018.8640130

Cite this

Giterman, R., Teman, A., & Fish, A. (2018). A 14.3pW sub-threshold 2T gain-cell eDRAM for ultra-low power IoT applications in 28nm FD-SOI. In 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018 Article 8640130 (2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/S3S.2018.8640130

Giterman, Robert ; Teman, Adam ; Fish, Alexander. / A 14.3pW sub-threshold 2T gain-cell eDRAM for ultra-low power IoT applications in 28nm FD-SOI. 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018. Institute of Electrical and Electronics Engineers Inc., 2018. (2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018).

@inproceedings{3fdac81a15c046c08cfb3eeda4807cb0,

title = "A 14.3pW sub-threshold 2T gain-cell eDRAM for ultra-low power IoT applications in 28nm FD-SOI",

abstract = "Internet of Things (IoT) applications, such as biomedical sensing, often require on-chip embedded memories, which dominate both the silicon area and power of these applications [1, 2]. To adhere to the ultra-low power (ULP) requirements of IoT applications, supply voltage ( VDD)scaling down to the sub-threshold voltage ( VT)region can be used to significantly reduce both the static and dynamic power consumption of these applications. However, embedded memories, typically implemented with 6T SRAM macros, suffer from decreased noise margins and become unreliable at near-VTsupply voltages [2-4].",

author = "Robert Giterman and Adam Teman and Alexander Fish",

note = "Publisher Copyright: {\textcopyright} 2018 IEEE.; 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018 ; Conference date: 15-10-2018 Through 18-10-2018",

year = "2018",

month = jul,

day = "2",

doi = "10.1109/S3S.2018.8640130",

language = "אנגלית",

series = "2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018",

address = "ארצות הברית",

}

Giterman, R, Teman, A & Fish, A 2018, A 14.3pW sub-threshold 2T gain-cell eDRAM for ultra-low power IoT applications in 28nm FD-SOI. in 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018., 8640130, 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018, Institute of Electrical and Electronics Engineers Inc., 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018, Burlingame, United States, 15/10/18. https://doi.org/10.1109/S3S.2018.8640130

A 14.3pW sub-threshold 2T gain-cell eDRAM for ultra-low power IoT applications in 28nm FD-SOI. / Giterman, Robert; Teman, Adam ; Fish, Alexander.
2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018. Institute of Electrical and Electronics Engineers Inc., 2018. 8640130 (2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - A 14.3pW sub-threshold 2T gain-cell eDRAM for ultra-low power IoT applications in 28nm FD-SOI

AU - Giterman, Robert

AU - Teman, Adam

AU - Fish, Alexander

PY - 2018/7/2

Y1 - 2018/7/2

N2 - Internet of Things (IoT) applications, such as biomedical sensing, often require on-chip embedded memories, which dominate both the silicon area and power of these applications [1, 2]. To adhere to the ultra-low power (ULP) requirements of IoT applications, supply voltage ( VDD)scaling down to the sub-threshold voltage ( VT)region can be used to significantly reduce both the static and dynamic power consumption of these applications. However, embedded memories, typically implemented with 6T SRAM macros, suffer from decreased noise margins and become unreliable at near-VTsupply voltages [2-4].

AB - Internet of Things (IoT) applications, such as biomedical sensing, often require on-chip embedded memories, which dominate both the silicon area and power of these applications [1, 2]. To adhere to the ultra-low power (ULP) requirements of IoT applications, supply voltage ( VDD)scaling down to the sub-threshold voltage ( VT)region can be used to significantly reduce both the static and dynamic power consumption of these applications. However, embedded memories, typically implemented with 6T SRAM macros, suffer from decreased noise margins and become unreliable at near-VTsupply voltages [2-4].

UR - https://www.scopus.com/pages/publications/85063130649

U2 - 10.1109/S3S.2018.8640130

DO - 10.1109/S3S.2018.8640130

M3 - ???researchoutput.researchoutputtypes.contributiontobookanthology.conference???

AN - SCOPUS:85063130649

T3 - 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018

BT - 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018

Y2 - 15 October 2018 through 18 October 2018

ER -

Giterman R, Teman A , Fish A. A 14.3pW sub-threshold 2T gain-cell eDRAM for ultra-low power IoT applications in 28nm FD-SOI. In 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018. Institute of Electrical and Electronics Engineers Inc. 2018. 8640130. (2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018). doi: 10.1109/S3S.2018.8640130

A 14.3pW sub-threshold 2T gain-cell eDRAM for ultra-low power IoT applications in 28nm FD-SOI

Abstract

Publication series

Conference

Bibliographical note

Funding

Access to Document

Other files and links

Fingerprint

Cite this