Abstract
The design of simple gain-enhancement configurations for cascode transistors is presented. Applying one- or two-stage differential amplifiers, or an improved regulated cascode configuration in the feedback loop of a cascode, allows high speed and high gain super-transistors at low-voltage to be designed. These concepts were implemented in a symmetrical OTA resulting in a measured 90 dB, 90 MHz, 30 mW amplifier performance for a 14 pF load. Settling measurements to 0.1% error for a unity-gain configuration are presented.
| Original language | English |
|---|---|
| Pages (from-to) | 1732-1735 |
| Number of pages | 4 |
| Journal | Proceedings - IEEE International Symposium on Circuits and Systems |
| Volume | 3 |
| State | Published - 1995 |
| Externally published | Yes |
| Event | Proceedings of the 1995 IEEE International Symposium on Circuits and Systems-ISCAS 95. Part 3 (of 3) - Seattle, WA, USA Duration: 30 Apr 1995 → 3 May 1995 |