90 dB, 90 MHz, 30 mW CMOS OTA for a high capacitive load

The design of simple gain-enhancement configurations for cascode transistors is presented. Applying one- or two-stage differential amplifiers or an improved regulated cascode configuration in the feedback loop of a cascode, allows high-speed and high-gain super-transistors at low voltage to be designed. These concepts were implemented in a symmetrical OTA resulting in a measured 90 dB, 90 MHz, 30 mW amplifier performance for a 14 pF load. Settling measurements to 0.1% error for a unity-gain configuration are presented.