The present work implements and adapts a fast shape recognition algorithm on the Xilinx VC707 VIRTEX-7 FPGA platform for HD color images. The hardware design was developed to correctly implement the algorithm using hardware description language (HDL) and intellectual property blocks (IP). The necessary configurations, specific for the selected platform, were developed to obtain a video output for images in RGB 4:4:4 format with a color depth per pixel of 36 bits through an HDMI interface to display the resulting image from the application of the algorithm. The algorithm was successfully tested on images in 720p-HD resolution in black and white, grayscale, and color formats, although is able to process images of a maximum resolution of 1080p-60 full-HD. The system performance was optimal in all tests without requiring to modify the original algorithm despite variations in resolution or image format.
|Title of host publication||2020 IEEE ANDESCON, ANDESCON 2020|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|State||Published - 13 Oct 2020|
|Event||2020 IEEE ANDESCON, ANDESCON 2020 - Quito, Ecuador|
Duration: 13 Oct 2020 → 16 Oct 2020
|Name||2020 IEEE ANDESCON, ANDESCON 2020|
|Conference||2020 IEEE ANDESCON, ANDESCON 2020|
|Period||13/10/20 → 16/10/20|
Bibliographical notePublisher Copyright:
© 2020 IEEE.
- Gray Scale
- Shape Recognition