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Engineering
Random Access Memory
98%
Retention Time
94%
Transistor
81%
Data Retention
75%
Spin transfer torque
63%
Magnetic Tunnel Junction
48%
Cryogenic Temperature
46%
Bit Line
45%
Area Reduction
45%
Nodes
40%
Design Space
36%
Dot Product
36%
Supply Voltage
30%
Room Temperature
28%
Electric Power Utilization
27%
Process Variation
26%
Dynamic Random Access Memory
18%
Power Budget
18%
Trigger Signal
18%
Interconnects
18%
Error Detection
18%
Electrical Engineering
18%
Single Event Upset
18%
Fits and Tolerances
18%
Design Engineering
18%
Computer Engineering
18%
Field-Effect Transistor
18%
Silicon on Insulator Technology
18%
Read Voltage
18%
Noise Margin
18%
Cell Design
18%
Limitations
18%
Combinatorial Circuits
18%
Dual-Mode
18%
Industry Standard
18%
Result Register
18%
Cycle Frequency
15%
Access Delay
15%
Architectural Transformation
15%
Context Modeling
15%
Process Step
15%
Random Process
15%
Access Time
15%
Optimal Design
15%
Design Optimization
15%
Design Practice
15%
Data Signal
13%
Input Port
12%
Output Port
12%
Inverter
12%
Computer Science
Transistor
100%
Data Retention
63%
embedded memory
56%
Pipelining
54%
Static Random Access Memory
49%
Associative Memory
45%
Energy Efficient
44%
Random Access Memory
42%
Read Operation
40%
Memory Technology
39%
High Throughput
36%
Dynamic Random Access Memory
36%
First-in-First-Out
36%
Memory Architecture
33%
Power Consumption
30%
Write Operation
28%
Nonvolatile
24%
Integrated Circuit
24%
Access Pattern
21%
Approximate Matching
20%
Hamming Distance
19%
Process Variation
19%
Temporary Memory
18%
Dot Product Algorithm
18%
Timing Analysis
18%
Compression Algorithm
18%
Physical Implementation
18%
Soft Error
18%
Performance Optimization
18%
Routing Congestion
18%
Logic Gate
18%
Performance Improvement
18%
Performance Loss
18%
Compiler
18%
Effect Transistor
18%
Deep Learning Method
18%
RISC-V
18%
Memory Structure
18%
Cycle Frequency
15%
Circuit Technology
15%
Interdependent Variable
15%
Design Optimization
15%
Complex Task
15%
Room Temperature
12%
Noise Margin
12%
Topology
9%
Open Source
9%
Design Challenge
9%
Pipelined Implementation
9%
Energy Efficiency
9%
Keyphrases
Gain Cell
90%
EDRAM
90%
Gain-cell Embedded DRAM (GC-eDRAM)
36%
Read Operation
34%
Write Operation
33%
Data Retention Time
31%
28nm FD-SOI
28%
Wordline
27%
Retention Time
21%
Memory Technologies
21%
Spin-transfer Torque Magnetic RAM (STT-MRAM)
18%
Energy Efficient
18%
Embedded Memory
18%
Design Space
18%
Non-volatility
18%
Controller
18%
Modern Systems
18%
Energy Bottleneck
18%
Well-defined
18%
Magnetic RAM
18%
Emerging Memory
18%
Hard Magnetic Disk
18%
Von Neumann Model
18%
Electrical Engineering
18%
Rapid Design
18%
Associate Professor
18%
New Requirements
18%
Capacity Increase
18%
Half-select
18%
Resistive Random Access Memory (ReRAM)
18%
Bias-compensated
18%
Fifo
18%
Clock-free
18%
Transistor
18%
Degree Programs
18%
Upskilling
18%
Hardware Design
18%
Computer Engineering
18%
Engineering Design
18%
Read Port
18%
Phase Change Random Access Memory (PCRAM)
18%
Error Detection
18%
Large Capacity
18%
Israel
18%
Chip Design
18%
Memory Structure
18%
1W1R
18%
Nano-scaled
18%
Body Bias
18%
Large Bandwidth
18%
